Jerrold MVP baseband scrambler

The MVP, or “Modulating Video Processor” is a combined modulator and video scrambler.

The MVP accepts baseband composite NTSC video and audio as inputs, applies sync-suppresion and video-inversion scrambling, and outputs modulated video at a 45.75 MHz IF. The IF-out may then be connected to a suitable upconverter and launch amplifier.

There was a variant, the “MVP-PAL”, which accepted PAL video instead of NTSC. I'd like to obtain one of these units, or find out more about the differences between it and the standard (NTSC) MVP. If you happen to know anything about the MVP-PAL, please contact me.

MVP-II Datasheet

The Option DIP switches are located on the rear panel, below the Aux/GND screw terminals.

• Up: 0
• Down: 1
• Don't care: X

• RF: none, 6dB or 10dB sync suppression with no inversion or audio privacy. Data is sent as AM modulation of the FM audio carrier. Compatible with RF terminals. Emulates the DSE Digital Scrambler Encoder.
• Baseband: none, 6dB or 10dB sync suppression with optional video inversion. Data is sent as 3.58MHz bursts on VBI lines. Compatible with Baseband terminals. Emulates the VPE Video Processor Encoder.
• Mixed: None, 6dB or 10dB sync suppression. Data is sent as both AM modulation of the FM audio carrier, and VBI data. Video inversion and audio privacy are disabled. Compatible with both RF and Baseband terminals.
• SSE: Emulates the Starpack Scrambler/Encoder. Allows 6dB sync suppression, no video inversion, and no audio privacy. Compatible with Starpack and RF terminals.
• Alternate: Used with Hamlin encoders to place AM timing data on the sound carrier. No video inversion or audio privacy. Use only with Hamlin compatible RF converters.
• Timing Camouflage: RF mode only. Inserts false timing pulses to confuse pirate descramblers.
• Data Camouflage: RF mode only. Inserts false data to confuse pirate descramblers.

• SW304 (rear of PCB, in audio section): Audio input impedance. “600” for 600-ohm balanced audio, “50k” for 50k unbalanced audio.
• SW303 (front part of audio section): Unknown. Set to “On”.
• SW302 (middle part of audio section): Unknown. Set to “On”.
  • Switching to “Off” causes attenuation of audio above ~10kHz.
  • Treble boost? Pre-emphasis on/off?
• SW202 (rear part of video section): Unknown. Set to “Off”.
  • Switching to “On” attenuates audio.
  • Audio attenuator?

• Main processor: Mitsubishi MELPS-740 variant with internal Jerrold Biphase receiver/transmitter (GIC 135-062-003, 968-100, 946104)
• ROM: 27C256
• Realtime clock: Oki MSM62X42B

U6 (74HC245) – address not known. DIR = RAM /WE, OE = white PAL pin 18. “B” bus connects to the CPU/RAM/ROM data bus. “A” bus connects to the other 74HC245s and the front panel board.

The switches have pull-up resistors, and have their common pin connected to ground. To get the selected value in binary form, invert the value read from the port.

The firmware contains a table which maps a binary code to segment data values:

The segment data bits map to a byte as follows:

 A
F B
 G
E C
 D   *

*=decimal point

Segments:  FGED*CBA
Bits:      76543210

The operation manual for the MVP-II is (at the time of writing) available from http://systemindustrialgroup.com/Enter/support/MVP_op.pdf.

The MVP communicates with a headend controller using the Biphase In and Out ports on the back panel. The data format is Manchester-encoded data, in the same format and at the same data rate as the Jerrold FM data channel commands used to send commands to cable receivers. For more on the FM data channel format, see GI/Jerrold FSK data format.

The input circuit is an LM311 comparator with a 75-ohm terminated input and a threshold of around 1V.

The output driver is a SN75158 which feeds the Biphase output port via a 75-ohm series resistor.

As the voltage levels in use are (broadly) 0V/5V, it is possible to drive the input and output with an Arduino or similar 5V-powered processor.

The MVP's logical address may be set between 260097 and 260999 (3F801 hex to 3FB87 hex, or 774001 octal to 775607 octal) using the BCD thumbwheel switches on the back panel.

The following code can convert the decimal logical address to and from the four-byte logical address sent over the biphase network:

void mvp_addr_to_la(const uint32_t addr, uint8_t *la)
{
	// NOTE: The address entered on the MVP's panel and on the ACC is one higher than the address in the packet.
	uint32_t real_addr = addr - 1;
 
	// encapsulate the LA
	la[0] = 0xE0;	// geocode 0-7
	la[1] = 0xBF;	// octal 77 => headend equipment
	la[2] = 0x40 | ((real_addr >> 6) & 0x3F);	// LA high 6 bits
	la[3] = 0x00 |  (real_addr & 0x3F);			// LA low  6 bits
}
 
 
uint32_t mvp_la_to_addr(const uint8_t *la)
{
	uint32_t real_addr = 0;
 
	// NOTE: The address entered on the MVP's panel and on the ACC is one higher than the address in the packet.
 
	real_addr  = ((uint32_t)la[3] & 0x3F);
	real_addr |= ((uint32_t)la[2] & 0x3F) << 6;
	real_addr |= ((uint32_t)la[1] & 0x3F) << 12;
	real_addr |= ((uint32_t)la[0] & 7) << 18;
 
	return real_addr + 1;
}

Return packets (on the MVP's Biphase Out port) have the following format:

• IRG bytes (at least one), all 0xFF
• Packet length in bytes
• Four-byte logical address (sender address)
• Data payload
• Two's complement checksum (sum of all bytes in the packet and the checksum should be zero)
• XOR checksum (XOR of all bytes in the packet, the two's complement checksum, and the XOR checksum should be zero)

Where return data from a command is described below, only the payload contents will be described.

The following commands are understood by the MVP:

Sets the MVP scrambler's realtime clock.

This command causes the addressed MVP scrambler to reboot.